1. Technical Field
The present invention relates to a method for manufacturing an electronic device.
2. Related Art
In recent years, remarkably increasing processing speed of the semiconductor device leads to a problem of generating a transmission delay due to a decrease in a signal propagation rate, which is caused by an interconnect resistance in a multi-layer interconnect and a parasitic capacitance between the interconnects. Such problem tends to become more and more considerable, due to an increased interconnect resistance and an increased parasitic capacitance, which are caused in accordance with miniaturizations of a linewidth and an interconnect interval created by an increased integration of the semiconductor device. Consequently, in order to prevent a signal delay caused on the basis of enhancements in the interconnect resistance and in the parasitic capacitance, it has been attempted that a copper interconnect is introduced as a substitute for the conventional aluminum interconnect, and a low dielectric constant film (hereinafter referred to as “low-k film”) is employed for an interlayer insulation film. Here, the low dielectric constant film may be an insulating film having a relative dielectric constant lower than a relative dielectric constant of a silicon dioxide (SiO2) film of 3.9.
A damascene process is a process for forming the above-described copper interconnect. This is a technology of forming the interconnects without etching copper, in view of the fact that control of the etch rate for copper (Cu) is difficult as compared with aluminum (Al), or more specifically, this is a damascene interconnect (trench interconnect) technology, in which trenches for interconnects (trenches) or connection apertures (via holes) are formed in an interlayer insulating film via a dry etching process and then such trenches or via holes are filled with copper or copper alloy.
In so-called dual damascene interconnect technology, in which trenches (trenches for dual damascene interconnects) formed by connecting the above-described trench with the via holes are provided in the above-described interlayer insulating film and then the trenches and via holes are integrally plugged with an interconnect material film, various types of formation processes are energetically developed toward the practical use thereof (see, for example, Japanese Laid-open patent publication No. 2004-111,950). Such process for forming the dual damascene interconnect can be roughly classified into a via first process, a trench first process and a dual hard masking process, depending on differences in the process for forming a trench for the above-described dual damascene interconnect. In these processes, the via first process and the trench first process commonly involve forming trenches for dual damascene interconnects via a dry etching process of the interlayer insulating film employing a resist mask. The via first process further involves, at first, forming via holes, and then forming trenches, and the trench first process further involves, inversely, at first, forming trenches, and then forming via holes. On the contrary, the above-described dual hard masking process involves collectively forming the trenches for dual damascene interconnects via a dry etching process of the interlayer insulating film employing a hard mask.
Amongst the above-described dual damascene interconnect technologies, the above-described via first process has the following benefits, as compared with other processes. That is, compatibility thereof with the single damascene process is higher and thus a conversion thereto is easier in the photolithography process and the dry etching process, and a reduction of leakage current between the damascene interconnects is facilitated. Accordingly, investigations on the above-described via first process aiming for providing the practical use are widely carried out in recent days.
However, when the trench opening is formed by the via first process in a conventional process, problems of causing fluctuation in a pattern dimension or causing a pattern-collapse of a patterned resist for forming the trench opening have been arisen.